Device isolation method in integrated circuits

Details Device isolation method in integrated circuits Device isolation method in integrated circuits

1994-04-22

1996-10-22

Fourson, George

Fishing, trapping, and vermin destroying

437 70, 437984, 437 72, H01L 2176

Patent

active

055676456

ABSTRACT:
An improved method for performing a local oxidation of silicon (LOCOS) capable of forming a sufficient thickness of a field oxide film even in narrow isolation regions. After defining the isolation region, a first field oxide film is formed in the isolation region by means of a first field oxidation. A film formed of HTO, LTO or SOG, or a pre-oxide film formed of polysilicon is formed on the resultant product. Then, the film, oxide film or the pre-oxide film is removed by anisotropically etching with a dry etching process or a chemical mechanical process so as to be left only in the isolation region, which after a second field oxidation forms a second field oxide film. According to the present invention, the problems associated with the field oxide film thinning effect usually associated with the conventional LOCOS-series isolation method can be overcome by either making the isolation structure in narrow isolation regions have a total thickness which is equal to that in the wide isolation regions, or by making the former thicker than the latter.

REFERENCES:
patent: 3900350 (1975-08-01), Appels et al.
patent: 3911562 (1975-10-01), Youmans
patent: 4721687 (1988-01-01), Kakumu et al.
Wolf, S. et al, Silicon Processing for the VLSI Era: Process Technology, Lattice Press, 1986, pp. 556-557.
Wolf, S., Silicon Processing for the VLSI Era: vol. 1, Process Technology, Lattice Press, pp. 182-187, .COPYRGT.1986.

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