Device improvement by source to drain resistance lowering throug

Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Ion implantation of dopant into semiconductor region

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438664, 438682, H01L 21425, H01L 2144

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active

061331244

ABSTRACT:
Various methods of fabricating a silicide layer, and devices incorporating the same are provided. In one aspect, a method of fabricating a silicide layer on a substrate is provided. The method includes the steps of damaging the crystal structure of a portion of the substrate positioned beneath the spacer and depositing a layer of metal on the substrate. The metal layer and the substrate are heated to react the metal with the substrate and form the silicide layer, whereby a portion of the silicide layer extends laterally beneath the spacer. Any unreacted metal is removed. The method enables fabrication of silicide layers with substantial lateral encroachment into LDD structures, resulting in lower possible source-to-drain resistance and enhanced performance for transistors.

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Stanley Wolf and Richard N. Tauber; Silicon Processing for the VLSI Era; vol. 2: Process Integration; pp. 150-151; 1990.

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