Device for validating an integrated circuit

Details Device for validating an integrated circuit Device for validating an integrated circuit

2008-04-01

2008-04-01

Duncan, Marc (Department: 2113)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C714S032000, C714S732000, C714S735000

Reexamination Certificate

active

07353430

ABSTRACT:
A device (10) for validating a circuit (1) comprising at least one microprocessor (3) and a specialized unit (2) provided with registers includes a base (11) for receiving the circuit, a memory (4, 5) simulating an external memory with which the circuit is intended to cooperate and a computer (20) controlling the validation. The memory (4, 5) contains software for processing data received by the circuit and instructions for executing a validation sequence, making it possible to form a data flow representing a flow received by the circuit in normal operation, to compare data contained in registers of the circuit with theoretical values and to supply a signature representing a result of these comparisons.

REFERENCES:
patent: 5958074 (1999-09-01), Sugimoto
patent: 6003142 (1999-12-01), Mori
patent: 6173386 (2001-01-01), Key et al.
patent: 6249893 (2001-06-01), Rajsuman et al.
patent: 6253344 (2001-06-01), Fin et al.
patent: 6385739 (2002-05-01), Barton et al.
patent: 2002/0026258 (2002-02-01), Suzuki et al.
patent: 2003/0196146 (2003-10-01), Padwekar et al.
patent: 199 47 603 (2000-05-01), None

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