Device for transmitting data between memories

Details Device for transmitting data between memories Device for transmitting data between memories

2006-07-28

2009-12-08

Peugh, Brian R (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711S103000, C710S005000, C710S022000, C365S185330

Reexamination Certificate

active

07631153

ABSTRACT:
An apparatus for data transmission between memories has a memory controller as well as a memory protocol controller. In one embodiment, a first memory controller is operatively connected to a first memory, and a memory protocol controller is operatively connected between the first memory controller and a second memory, wherein the first memory is a volatile memory and the second memory is a nonvolatile memory. The volatile memory includes a command list containing a command sequence for the memory protocol controller. The memory protocol controller may be configured to produce at least one of an error detection code and an error correction code when an error condition occurs.

REFERENCES:
patent: 6711059 (2004-03-01), Sinclair et al.
patent: 6748457 (2004-06-01), Fallon et al.
patent: 2003/0120865 (2003-06-01), McDonald et al.
patent: 2003/0217202 (2003-11-01), Zilberman et al.
patent: 0206657 (1986-12-01), None
patent: 03/104976 (2003-12-01), None
PCT International Search Report dated Oct. 12, 2005.

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