Device for receiving series data

Details Device for receiving series data Device for receiving series data

2004-04-26

2009-08-25

Fan, Chieh M (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S375000, C375S376000

Reexamination Certificate

active

07580496

ABSTRACT:
A circuit for receiving digital data arriving in series comprising a circuit for generating a reference dock and a circuit for oversampling the received data memorizing the samples sampled at the rate of several clocks phase-shifted with respect to the reference clock, the oversampling circuit comprising means for selecting and providing as output data samples representative of the received data and, further, a detection circuit identifying the variations of the phase shift between the reference clock edges and the transitions of the received data by analyzing the memorized samples, the detection circuit controlling a frequency variation of the reference dock when the phase shift variations repeat over several sampling cycles.

REFERENCES:
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patent: 5550514 (1996-08-01), Liendberg
patent: 5974097 (1999-10-01), Julyan et al.
patent: 6271777 (2001-08-01), Lentine et al.
patent: 6304071 (2001-10-01), Popplewell et al.
patent: 6999544 (2006-02-01), Cranford et al.
patent: 2003/0041292 (2003-02-01), Lee et al.
patent: 2003/0165201 (2003-09-01), Shahar et al.
patent: 2004/0037383 (2004-02-01), Song
Dec. 12, 2003, French Search Report.

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