Device for processing data by means of a plurality of...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area

Reexamination Certificate

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C711S147000, C711S148000, C711S149000, C711S150000, C711S206000, C711S207000, C710S040000, C710S113000, C710S114000, C710S115000, C710S116000, C710S240000, C710S241000, C710S242000, C710S243000, C710S244000

Reexamination Certificate

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06901487

ABSTRACT:
A data processing device comprises a plurality of processors that are to access a memory system. The memory system comprises at least two memories The data processing device comprises a bus per memory. The buses are interconnected by at least one bridge. A processor is connected to a bus, and the data processing device comprises at least one memory table specifying with which memory an exchange of a data item between a processor and the memory system must be effected.

REFERENCES:
patent: 5682512 (1997-10-01), Tetrick
patent: 6052753 (2000-04-01), Doerenberg et al.
patent: 6157989 (2000-12-01), Collins et al.
patent: WO9532578 (1995-11-01), None

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