Device for estimating number of board layers constituting...

Details Device for estimating number of board layers constituting... Device for estimating number of board layers constituting...

2007-05-08

2007-05-08

Chiang, Jack (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

10777103

ABSTRACT:
A device for estimating the required number of board layer to provide necessary wiring in a printed circuit board or a LSI package, a system including the device, a method and a program for estimating the same. In this system, positional information of pins mounted to each component and a board, and connection information between pins are retrieved from a pin positional information file and a net list file. Further, information about an order of layers to be added, a diameter of a via in respective layers and obstacles to wiring is retrieved from the net list file an added layer structure defining file. Thereafter, information about a layer structure, vias, an area where wiring is prohibited is stored in a storage. A wiring route searching section determines whether or not it is possible to form necessary wiring under the present structure. When the wiring route searching section determines it to be impossible, a layer in the next order is added according to information about added layers. Subsequently, the wiring route searching section judges the possibility again. When determining it to be possible, the wiring route searching section outputs the present layer structure to an output device. By this means, it becomes possible to estimate a layer structure and the number of layers.

REFERENCES:
patent: 5745371 (1998-04-01), Shouen
patent: 6643839 (2003-11-01), Nishio et al.
patent: 2002/0178429 (2002-11-01), Nakayama et al.
patent: 2003/0115568 (2003-06-01), Miller et al.
patent: 6-236419 (1994-08-01), None
patent: 2000-331038 (2000-11-01), None
patent: 2002-56045 (2002-02-01), None

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