Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2006-06-30
2008-09-30
Cho, James H (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S031000
Reexamination Certificate
active
07429871
ABSTRACT:
An on die termination (ODT) control device includes a mode register set for generating a clock control signal based on mode set information; a clock control unit for receiving an internal clock signal and a delay locked loop (DLL) clock signal and outputting an intermediate internal clock signal and an intermediate DLL clock signal in response to the clock control signal; and an ODT control unit for controlling an ODT block by receiving an ODT control signal in response to the intermediate internal clock signal and the intermediate DLL clock signal.
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Kim Dong-keun
Kim Kyung-Hoon
Cho James H
Hynix / Semiconductor Inc.
McDermott Will & Emery LLP
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