Electrical computers and digital data processing systems: input/ – Input/output data processing – Direct memory accessing
Patent
1998-06-10
2000-12-05
Lee, Thomas C.
Electrical computers and digital data processing systems: input/
Input/output data processing
Direct memory accessing
710 3, 710 36, 710 38, 710131, 710132, G06F 1314, G06F 1340
Patent
active
061579696
DESCRIPTION:
BRIEF SUMMARY
FIELD OF THE INVENTION
The present invention relates to a computer with and more particularly, to a device for direct memory access requests.
BACKGROUND INFORMATION
Such a computer is known from Siemens Catalog IC 10, SICOMP Industrial Computer, 3/95 edition, describes a conventional computer where DMA request signals generated by plug-in functional units, e.g., in the form of data transmission modules, can be sent to a DMA controller of a motherboard over DMA request lines. To guarantee that the functional units can send their DMA request signals to the DMA controller over various DMA request lines (DMA channels), setting means in the form of coding switches are provided on these functional units. If the same DMA request line is inadvertently selected on two functional units for transmission of their DMA request signals, malfunctions occur in the computer because the DMA controller cannot recognize which functional unit has transmitted the DMA request signal.
SUMMARY OF THE INVENTION
The present invention relates to a computer including module slots connected to one another and coupled to address lines, data lines and control lines. The control lines include DMA request lines. The computer includes a DMA controller to which DMA request signals can be sent by plug-in functional units over the DMA request lines and setting means.
The object of the present invention is to simplify the selection of DMA request lines in a computer of the type mentioned above.
This object is achieved by outputs, lines, connected to their outputs.
Advantageous embodiments of the invention are derived from the subclaims.
The invention is based on the idea that n adjustable DMA channels of the plug-in cards car be connected to all DMA channels of a system bus as in a cross-bar distribution. A DMA channel that is not connected is switched with a high resistance, for which purpose a Fill-down resistor on the DMA controller generates a defined level.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 shows components of a bus wiring in accordance with the present invention.
DETAILED DESCRIPTION OF THE INVENTION
The invention is explained in greater detail below on the basis of an embodiment with reference to the only FIGURE in the drawing. The FIGURE in the drawing shows components of a bus wiring.
A system bus of a computer connects module slots which are each fitted with a functional unit and provided with a setting means, said bus comprising control lines 1, DMA request and acknowledgment lines 2a, 2b as well as address and data lines (not shown here). In the present example, m DMA request lines DRa, DRb, . . . DRm are provided for m module slots, with DMA request line DRa connected to the DMA input of a first setting means Ea, DMA request line DRb connected to DMA input of a second setting means Eb, and DMA request line DRm connected to DMA input of an m.sup.th setting means Em. Output lines DRQa, DRQb, . . . DRQm of setting means Ea, Eb, . . . Em, e.g., setting means in the form of multiplexers, are Interconnected as in a cross-bar distribution and lead to a DMA controller of a motherboard (not shown).
In the present example, it is assumed that three module slots are equipped with functional units, each of which is capable of activating DMA request lines DRa, DRb and DRm with a DMA request signal in the form of a level 1. During a computer parameterization run, parameterization program generates an identifier for each module slot and thus for each setting means Ea, Eb, . . . Em according to a user's specifications, said identifier indicating which of DMA request lines DRa, DRb, . . . DRm is to be activated for the respective junctional unit in the case of a DMA event. Furthermore, the parameterization program deposits these identifiers in registers assigned to the module slots. For the case when the identifiers for DMA request lines DRm, DRa and DRb are deposited for setting means Ea, Eb, . . . Em, a setting program, which may be part of the parameterization program, controls setting means Ea, Eb, . . . Em over respective con
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Lee Thomas C.
Perveen Rehana
Siemens AG
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