Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2005-08-09
2005-08-09
Badermann, Scott (Department: 2114)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S037000, C370S466000
Reexamination Certificate
active
06928587
ABSTRACT:
A device for analyzing digital data formulated in accordance with a communication protocol has a data memory for storing digital data to be analyzed. A microcode memory stores a microcode that represents at least part of the communication protocol. A data register is loaded with a pre-determined number of bits from the data memory, and a microcode register is loaded with a pre-determined number of bits from the microcode memory. The content of the microcode register is used to analyze the content of the data register. The results of the analysis are stored in an output memory. An addressing unit for the data memory and another addressing unit for the microcode memory take into account the contents of the data and/or microcode registers in determining the corresponding addresses.
REFERENCES:
patent: 4868783 (1989-09-01), Anderson et al.
patent: 6000041 (1999-12-01), Baker et al.
patent: 6134676 (2000-10-01), VanHuben et al.
patent: 6198751 (2001-03-01), Dorsey et al.
patent: 6618823 (2003-09-01), West
A.S. Tanenbaum, “The Microarchitecture Level”, 1999, pp 203-218.
Badermann Scott
Damiano Anne L.
Gray Francis I.
Tektronix International Sales GmbH
LandOfFree
Device for analyzing digital data does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Device for analyzing digital data, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Device for analyzing digital data will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3463301