Device comprising means for validating data written in a memory

Details Device comprising means for validating data written in a memory Device comprising means for validating data written in a memory

1995-05-22

1997-10-07

Nelms, David C.

Static information storage and retrieval

Read/write circuit

36515529, 235379, 235382, G11C 700

Patent

active

056755414

ABSTRACT:
The device comprises an EEPROM memory. A data written in this memory is considered to be valid if two "neutral" locations are situated contiguously with the data to be validated.
The "neutral" locations are produced by a prior erasure which is necessary for the EEPROM memory in order to write a data.

REFERENCES:
patent: 4780602 (1988-10-01), Kawana et al.
patent: 4870260 (1989-09-01), Niepolomski et al.
patent: 4877945 (1989-10-01), Fujisaki
patent: 4888686 (1989-12-01), Sinz
patent: 5243175 (1993-09-01), Kato

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