Device bandwidth management using a bus configuration...

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture

Reexamination Certificate

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C710S104000, C710S302000

Reexamination Certificate

active

07136957

ABSTRACT:
One embodiment of the invention includes a system for changing a bus configuration of a computing device. The system includes a first bus of the computing device, a second bus, and a third bus. Additionally, a multiplexing module is coupled with the first, second, and third buses. As such, the multiplexing module can selectively couple the first bus with the second bus or the third bus. A configuration module is coupled with the multiplexing module and controls its operation.

REFERENCES:
patent: 4777613 (1988-10-01), Shahan et al.
patent: 5867733 (1999-02-01), Meyer
patent: 5911149 (1999-06-01), Luan et al.
patent: 5918027 (1999-06-01), Osakabe
patent: 6101565 (2000-08-01), Nishtala et al.
patent: 2003/0210707 (2003-11-01), Pickett
patent: 2004/0139259 (2004-07-01), Mantey et al.
patent: 2005/0060593 (2005-03-01), Chen et al.
“Reduced switching delay in wavelength division multiplexed two-dimensional multiple-plane optical interconnections using multiple-wavelength VCSEL arrays” by Leight et al. (abstract only) Publication Date: Jun. 1996.

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