Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Having heterojunction
Reexamination Certificate
2004-06-23
2009-02-24
Vu, David (Department: 2818)
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
Having heterojunction
C117S002000, C117S928000
Reexamination Certificate
active
07494888
ABSTRACT:
The present invention provides a process for manufacturing a semiconductor device that can be incorporated into an integrated circuit. The method includes, forming a first doped layer of isotopically enriched silicon over a foundational substrate, forming a second layer of an isotopically enriched semiconductor material silicon over the first doped layer, and constructing active devices on the second layer. The device includes a first doped layer of an isotopically enriched semiconductor material and a second layer of an isotopically enriched semiconductor material located over the first doped layer, and active devices located on the second layer.
REFERENCES:
patent: 5144409 (1992-09-01), Ma
patent: 5891242 (1999-04-01), Pesklak et al.
patent: 6653658 (2003-11-01), Burden
patent: 2004/0169225 (2004-09-01), Burden
Gammel Peter L.
Jones Bailey R.
Kizilyalli Isik
Safar Hugo F.
Agere Systems Inc.
Vu David
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