Device and method to read a 2-transistor flash memory cell

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S202000, C365S185230

Reexamination Certificate

active

06980472

ABSTRACT:
The present invention relates to electronic memories, more particularly to an improved method and apparatus to read the content of compact 2-transistor flash memory cells.A method of reading a 2-transistor flash memory cell1is provided. The memory cell1comprises a storage transistor2with a storage gate6and a selecting transistor3with a select gate7. The method comprises leaving the storage gate6floating while the select gate7is switched from a first voltage to a second voltage, whereby the first voltage is lower than the second voltage.A device according to the present invention comprises a switching circuit for leaving the storage gate6floating while the select gate7is switched from the first voltage to the second voltage, the first voltage being lower than the second voltage.

REFERENCES:
patent: 5471422 (1995-11-01), Chang et al.
patent: 5914514 (1999-06-01), Dejenfelt et al.
patent: 6212102 (2001-04-01), Georgakos et al.
patent: 6307781 (2001-10-01), Shum
patent: 6757196 (2004-06-01), Tsao et al.

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