Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1997-03-20
1998-06-02
Ngo, Ngan V.
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257360, 257361, H01L 2362
Patent
active
057604452
ABSTRACT:
A protection device which protects against charge build up on a thin oxide gate during plasma etching is provided. The protection device may be described as a floating well PMOS device. When the PMOS transistor is formed, a lateral parasitic pnp transistor is also formed. In the lateral pnp device the base is floating, the collector is connected to ground and the emitter is connected to the gates of the host PMOS protection device and the device to be protected. In operation, the gate of the PMOS transistor is tied to the source of the PMOS transistor so that the PMOS transistor is off. Thus, the lateral pnp transistor controls the charging and discharging of the charge stored on the gate oxide. Excessive charge build up is prevented by the breakdown voltage of the lateral pnp transistor. Because protection is achieved by pnp breakdown operation, the size of the pnp protection device can be substantially lower than other protection devices.
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Hyungcheol Shin, Zhi-Jian Ma and Chenming Hu, "Impact of Plasma Charging Damage and Diode Protection on Scaled Thin Oxide", IEEE, 1993, pp. 467-470.
F. Shone, K. Wu, J. Shaw, E. Hokelek, S. Mittal, and A. Haranahalli, "Gate Oxide Charing and its Elimination for Metal Antenna Capacitor and Transistor in VLSI CMOS Double Layer Metal Technology", pp. 73-74.
Croll Timothy R.
Hewlett--Packard Company
Lee Denise A.
Ngo Ngan V.
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