Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2006-03-21
2006-03-21
Decady, Albert (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S794000, C714S796000
Reexamination Certificate
active
07017103
ABSTRACT:
A Viterbi equalizer for equalization of a data signal transmitted via a channel that is subject to interference has at least one add-compare-select unit (ACS), which carries out an ACS operation for each channel state in a time step k. Furthermore, the equalizer has a unit for calculating metric increments in advance and for storing the metric increments. The calculation unit calculates in advance the metric increments relating to all the transitions from a state which can be predetermined in the time step k to the states which can be reached by the transitions in the time step k+1. The metric increments are retained in an output memory such that they can be called up for utilization in the ACS unit.
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Becker Burkhard
Bohnhoff Peter
Yang Bin
De'cady Albert
Gandhi Dipakkumar
Greenberg Laurence A.
Infineon - Technologies AG
Locher Ralph E.
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