Device and method for verifying independent reads and writes in

Details Device and method for verifying independent reads and writes in Device and method for verifying independent reads and writes in

1998-01-02

1999-10-26

Nguyen, Tan T.

Static information storage and retrieval

Read/write circuit

Testing

36518907, G11C 2900

Patent

active

059739711

ABSTRACT:
A device and method for verifying independent reads and writes in a memory array includes bit inserters in the array to simultaneously insert a predetermined value into multiple portions of the array. Each row may have a corresponding row bit inserter. Alternatively, or in addition, each memory cell may have a storage element bit inserter. A row bit inserter places a predetermined value at the inputs of a row write port. The storage element bit inserters pre-set memory cells to a predetermined value. To test the read circuitry, storage element bit inserters are set to a predetermined value, and a read is performed. If the value read from a memory cell does not match the value to which it was set, it can be inferred that the read circuitry is not functioning properly. If the values match, it can be inferred that the read circuitry is functioning properly. To test the write circuitry, a row bit inserter may be set to a predetermined value. A write is performed, followed by a read. If the value read from a memory cell matches the value to which the row bit inserter was set, it can be inferred that the write circuitry is functioning properly. If the values do not match, and if it has already been determined that the read circuitry is functioning properly, it can be inferred that the write circuitry is not functioning properly.

REFERENCES:
patent: 5404332 (1995-04-01), Sato et al.
patent: 5424988 (1995-06-01), McClure et al.
patent: 5742557 (1998-04-01), Gibbins et al.

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