Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
Reexamination Certificate
2006-09-28
2009-12-22
Kindred, Alford W (Department: 2181)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output data buffering
C710S057000, C710S059000
Reexamination Certificate
active
07636803
ABSTRACT:
A device and method for transferring data is disclosed that facilitates data transfers between devices having different clock domains. The data transfer from one device to another occurs through a First In First Out memory (FIFO). The relative number of FIFO access cycles to the FIFO is controlled to maintain a desired FIFO fullness. Setting the desired FIFO fullness to a desired value allows control of data transfer latency between devices.
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Madrid Philip E.
Williams Wade L.
Advanced Micro Devices , Inc.
Huson Zachary K
Kindred Alford W
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