Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator
Patent
1998-02-27
1999-12-21
Nelms, David
Static information storage and retrieval
Read/write circuit
Including reference or bias voltage generator
365226, G11C 700
Patent
active
060058129
ABSTRACT:
A Dynamic Random Access Memory (DRAM) device includes a bus for distributing a boosted voltage V.sub.CCP within the device. A conventional internal voltage regulator, ring oscillator, and charge pump help to boost the boosted voltage V.sub.CCP on the bus when the voltage V.sub.CCP falls below a preset minimum. During testing of the DRAM device, when the demand on the boosted voltage V.sub.CCP can be four or more times as much as it is under normal operating conditions, an external current source drives current I.sub.CCP into an unused bond pad, such as a no-connection (NC) or address signal bond pad. An NMOS transistor switch then connects this bond pad to the boosted voltage V.sub.CCP bus when a pump circuit controlled by the ring oscillator activates the switch. As a result, the external current augments the efforts of the internal charge pump to boost the voltage V.sub.CCP during testing, so there is no need to build the internal charge pump with oversized capacitors to handle the excessive V.sub.CCP demand during testing.
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Betty Prince, Semiconductor Memories, p. 9, 1995.
Micro)n Technology, Inc.
Nelms David
Tran M.
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