Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2006-11-09
2009-11-17
Peugh, Brian R (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C709S238000
Reexamination Certificate
active
07620770
ABSTRACT:
A device and method for storing and processing data units. The method includes: storing, at a read request dual port random access (DPR) memory unit, at least one request to read data from a double data rate (DDR) memory unit; storing, at a write request dual port random access (DPR) memory unit, at least one request to write data to a double data rate (DDR) memory unit; selecting a stored request to be sent to the DDR memory unit; wherein if the selected stored request is a write request, storing an ingress data unit at the DDR memory unit; and retrieving a fetched data unit from the DDR memory unit and processing the fetched data unit to provide an egress data unit; wherein the fetched data unit comprises at least a portion of the ingress data unit.
REFERENCES:
patent: 2006/0143410 (2006-06-01), Chen et al.
patent: 2006/0221945 (2006-10-01), Chin et al.
patent: 2006/0294322 (2006-12-01), Matsuzaki et al.
patent: 2007/0266179 (2007-11-01), Chavan et al.
Gross Yoram
Levi David
Ethernity Networks Ltd.
Pearl Cohen Zedek Latzer LLP
Peugh Brian R
Rutz Jared I
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