Device and method for small discontiguous accesses to...

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules

Reexamination Certificate

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C711S157000, C711S158000, C711S168000, C711S169000, C365S230030, C365S230050

Reexamination Certificate

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11011506

ABSTRACT:
A memory architecture design and strategy is provided using memory devices that would normally be considered disadvantageous, but by accommodating the data input, output, and other peripheral controller services, overall performance in this mode is optimized. The surprising result is that even though the choice of memory is inappropriate for the task based on the precepts of the prior art, the overall memory system is effective. Bank switching in DDR-SDRAM can be utilized to achieve technological feasibility without resorting to, for example, SRAM.

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