Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
1999-01-14
2002-03-19
Gossage, Glenn (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S106000, C365S205000, C365S222000, C365S189040
Reexamination Certificate
active
06360294
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to memories, and, more particularly to a device and process for reading/rewriting of a memory cell or memory slot of a dynamic random-access memory (DRAM), but not exclusively with respect to a memory cell or memory slot with one, two or three transistors.
BACKGROUND OF THE INVENTION
As opposed to static random access memories (SRAMs) in which the information stored remains so indefinitely at least for as long as this memory remains energized, dynamic memories exhibit the feature of requiring a periodic refreshing of the information stored. This so because of the stray leakage currents which discharge the storage capacitance of each memory slot.
Dynamic random access memories are conventionally organized in rows and columns of memory cells and comprise, for each column, an amplification device for reading/rewriting each memory cell selected. This device comprises precharge means making it possible to precharge the corresponding column of the matrix (commonly termed a “Bit Line” by those of ordinary skill in the art) to a chosen voltage level. The device also includes amplification means comprising two looped-back inverters forming a bistable flip-flop each formed by two complementary transistors and controlled by two successive signals, read and rewrite (commonly known respectively as “sense” and “restore”).
The periodic refreshing of the information stored is performed memory cell after memory cell within a given line, and line after line. Over the duration of refreshing a line, no memory cell of this line can be the subject of read or write access, since the amplifier still contains the information from the memory cell addressed and therefore may not be used at the same time to refresh other lines. Thus, the application which uses the dynamic random-access memory must be halted periodically so as to carry out the refreshing of the memory cells. This causes a slowing down of the execution of the application and a degradation of the performance of the apparatus in which the dynamic random-access memory is arranged.
SUMMARY OF THE INVENTION
The invention overcomes this problem by enabling the application to operate during the refreshing of the information contained in a memory cell.
An object of the invention is to improve the speed of reading and writing perceived by the user of the dynamic random-access memory and to allow read/rewrite accesses simultaneously with the refresh operations.
The device for reading/rewriting a memory cell of a dynamic random-access memory organized in rows and columns, according to the invention, comprises, for each column, a first read/rewrite amplifier. The device comprises at least one second read/rewrite amplifier connected in parallel with the first amplifier and means for controlling one of the amplifiers so that the amplifier is able to store the information contained in the memory cell so that the memory cell may be refreshed and so that the other amplifier is able to perform read/rewrite accesses to the memory cell. Thus, during a refresh operation, the information remains available in one of the amplifiers and is available for a read access. This same amplifier is available during this time for a write access.
In one embodiment of the invention, with the inputs of the amplifiers being connected to two common columns, one of which is connected to the memory cell, each input of each amplifier is provided with control means able to isolate the input from the corresponding column and from the input of the other amplifier. The device can comprise a pre-amplifier arranged between the memory cell and the amplifiers. This pre-amplifier makes it possible to speed up the operation of the memory.
In one embodiment of the invention, one of the amplifiers is permanently dedicated to operations for refreshing the memory cell and the other amplifier is dedicated to the memory cell read/rewrite operations. In another embodiment of the invention, each amplifier is able alternately to perform the refresh operations and the read/rewrite operations.
Advantageously, the outputs of the amplifiers are connected to common output columns, each output of each amplifier being provided with an interrupter able to isolate the output from the corresponding output column and from the corresponding output of the other amplifier. The roles of the two amplifiers are thus interchangeable. The device can comprise an amplifier arranged at each end of a column. This arrangement is advantageous since it allows the presence of two amplifiers in a dynamic random-access memory possessing a small number of levels of metallization by virtue of smaller bulk.
The invention also proposes a process for controlling a device for reading/rewriting a memory cell of a dynamic random-access memory organized in rows and columns.
The device includes, for each column, at least two read/rewrite amplifiers arranged in parallel. During a write operation of a memory cell, one of the amplifiers holds a new datum which is to be written to the memory cell and the other amplifier performs operations for refreshing the memory cell. The new datum is written to the memory cell at the conclusion of the access to the line to which the memory cell belongs so as not to interrupt any refresh operation e being performed on the line. The datum stored in the memory cell can be held in one of the amplifiers prior to a read operation, so that the datum can be available for a refresh operation.
Thus, the application currently operating and perhaps requiring use of the information stored in the dynamic random-access memory is not halted during the operations for refreshing the memory cells. Therefore, from the point of view of the user of the dynamic random-access memory, this increases the speed of reading/rewriting and allows an improvement in the processing speed of the application.
REFERENCES:
patent: 3949383 (1976-04-01), Askin et al.
patent: 4829484 (1989-05-01), Arimioto et al.
patent: 4980863 (1990-12-01), Ogihara
patent: 5253211 (1993-10-01), Suzuki
patent: 5291443 (1994-03-01), Lim
patent: 5587952 (1996-12-01), Kitsukawa et al.
patent: 5644543 (1997-07-01), Kim et al.
patent: 5822266 (1998-10-01), Kikinis
patent: 0 828 254 (1998-03-01), None
Bouche Michel
Ferrant Richard
Allen Dyer Doppelt Milbrath & Gilchrist, P.A.
Gossage Glenn
STMicroelectronics S.A.
LandOfFree
Device and method for simultaneously reading/rewriting a... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Device and method for simultaneously reading/rewriting a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Device and method for simultaneously reading/rewriting a... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2878918