Device and method for improved serial bus transaction using...

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation

Reexamination Certificate

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C710S313000, C710S316000, C710S002000, C710S038000

Reexamination Certificate

active

07013355

ABSTRACT:
An incremental or bit by bit address decode scheme allows each device on a serial bus to determine as soon as possible if it is the device being addressed by a master device. As each address bit is received serially into a device, it is immediately compared with a corresponding bit of the device's address. As soon as there is a bit not matching, the device in question is determined to not be the one addressed by the master device. It can then be disengaged from the communication process and free up as soon as possible its internal resource initially reserved for possible access by the master device.

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