Device and method for efficient timing estimation in a digital r

Details Device and method for efficient timing estimation in a digital r Device and method for efficient timing estimation in a digital r

1994-08-30

1997-04-08

Chin, Wellington

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

375347, 375340, 375355, 370516, H04L 102, H04B 702

Patent

active

056195427

ABSTRACT:
The present invention provides for economical predictive symbol timing estimation in a digital receiver by reducing gate count and current drain. The invention also reduces the processing delay. The predictive symbol timing estimation method (300) and device (200) are applicable to any digital radio system which transmits on a continuous or semi-continuous basis.

REFERENCES:
patent: 5073904 (1991-12-01), Nakamura et al.
patent: 5329555 (1994-07-01), Marko et al.
patent: 5339452 (1994-08-01), Sugawara
patent: 5430769 (1995-07-01), Patsiokas et al.
patent: 5481568 (1996-01-01), Yada

Affiliated with

Also associated with

Rating

Device and method for efficient timing estimation in a digital r does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Device and method for efficient timing estimation in a digital r, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Device and method for efficient timing estimation in a digital r will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2401913