Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2011-08-16
2011-08-16
Baderman, Scott T (Department: 2114)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S005110, C714S042000, C714S047300
Reexamination Certificate
active
08001430
ABSTRACT:
A method for controlling an execution of a first DMA task, the method includes comprises monitoring an execution of the first DMA task, the method characterized by including defining a first DMA task execution interval and a first DMA task execution sub-interval; and performing a first possible timing violation responsive operation if the first DMA task was not completed during the first DMA task execution sub-interval. A device having a first DMA task controlling capabilities, the device includes a memory unit; characterized by including a DMA controller that is adapted to monitor an execution of the first DMA task that involves an access to the memory unit, and to perform a first possible timing violation responsive operation if the first DMA task was not completed during a first DMA task execution sub-interval.
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Non-Final Office Action mailed Aug. 3, 2010 for U.S. Appl. No. 11/994,273, 21 pages.
Gurfinkel Sagi
Hassid Gilad
Kahn Eran
Shasha Uri
Baderman Scott T
Butler Sarai
Freescale Semiconductor Inc.
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