Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate
2007-04-10
2007-04-10
Phung, Anh (Department: 2824)
Static information storage and retrieval
Read/write circuit
Bad bit
C365S120000, C365S230060, C365S230080, C365S189050
Reexamination Certificate
active
11306381
ABSTRACT:
A device for compensating a semiconductor memory defect, suitable for use in a semiconductor memory, is provided. The device includes a memory array, having at least a defectless sub-memory region, the memory array being coupled to an address decoder circuit and a sensing circuit for storing data. A selection circuit is coupled to a control unit and outputs a selection signal to the control unit. A first input address buffer is coupled to the control unit and the address decoder circuit, and outputs an address signal to the address decoder circuit in response to the selection signal for selecting the defectless sub-memory region to store data. A method for compensating a semiconductor memory defect is also provided, including determining whether the memory region of the semiconductor memory has a defect; and replacing the memory region with the defectless sub-memory region to store data when the semiconductor memory is defective.
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patent: 7020003 (2006-03-01), Yeh
Jianq Chyun IP Office
Le Toan
Phung Anh
Winbond Electronics Corp.
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