Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis
Reexamination Certificate
2006-01-03
2006-01-03
Browne, Lynne H. (Department: 2116)
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
C713S400000, C702S057000, C702S108000, C702S127000
Reexamination Certificate
active
06983393
ABSTRACT:
A method for operating a system that includes several subsystems may involve establishing one or more synchronized timelines for the system; allocating timeslots within each of the timelines for operation of one or more devices in the system; detecting an input event asynchronously to the timeline; generating a timestamp indicative of the time at which the input event is detected relative to the timeline; performing a processing task in response to the input event during a time slot allocated to the processing task; and inhibiting generation of an output event until a second time relative to the timelines. Performing the processing task may generate data representative of the output event as well as data representative of the second time. The second time may be a pre-determined time interval after the input event detection time.
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Odom Brian Keith
Truchard James J.
Browne Lynne H.
Hood Jeffrey C.
Meyertons Hood Kivlin Kowert & Goetzel P.C.
National Instruments Corporation
Stoynov Stefan
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