Determining a set of processor cores to boot

Details Determining a set of processor cores to boot Determining a set of processor cores to boot

2011-05-10

2011-05-10

Wilson, Yolanda L (Department: 2113)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C713S001000, C713S002000

Reexamination Certificate

active

07941699

ABSTRACT:
Techniques that determine a strict subset of multiple processor cores from a set of multiple functional processor cores integrated within a single integrated circuit package. The determined strict subset of multiple processor cores differs from a previously determined strict subset of multiple processor cores from the set of multiple functional processor cores used to initiate an immediately previous core booting. In response to a processor reset, booting of the strict subset of multiple processor cores is initiated. Also, support for selecting multiple modes of operations, either supporting fault tolerance or extended life.

REFERENCES:
patent: 6550020 (2003-04-01), Floyd et al.
patent: 7055060 (2006-05-01), Nguyen et al.
patent: 7290169 (2007-10-01), Safford et al.
patent: 7353375 (2008-04-01), Cepulis
patent: 7472266 (2008-12-01), Kumar et al.
patent: 2004/0221196 (2004-11-01), Datta et al.
patent: 2004/0230865 (2004-11-01), Balazich et al.
patent: 2005/0015661 (2005-01-01), Vaidyanathan
patent: 2005/0022059 (2005-01-01), Wei
patent: 2005/0240811 (2005-10-01), Safford et al.
patent: 2005/0240829 (2005-10-01), Safford et al.
patent: 2007/0283137 (2007-12-01), Ueltschey et al.
patent: 2007/0288738 (2007-12-01), Dale et al.
William Bryg, “The UltraSPARC T1 Processor-Reliability, Availability, and Serviceability”, Sun Microsystems, Dec. 2005, Sun Microsystems, Inc. Santa Clara, CA, USA, 9 pages.
Ohsai Hamada, “High-Reliability Technology of Mission-Critical IA Server PRIMEQUEST”, fujitsu Sci. Tech.J., 41,3,p. 284-290, Oct. 2005.
Intel Corporation, “Multi Processor Specification”, Version 1.4, May 1997, 97 pages.
Jon Stokes, “Intel Boosts Itanium Line with Montvale”, Ars Technica, the art of technology, Oct. 31, 2007, http://arstechnica.com
ews.ars/post/20071031-intel-boosts-itanium-line-with-montvale.html, last accessed Mar. 21, 2008. 3 pages.
Robert Hillman et al., “Adaptive Fault-Tolerant Computer Capable of Error-Free Operation During solar Flares”, Maxwell Technologies, San Diego, California, Jan. 1, 2004, 2 pages.
Nhon Quach, “High Availability And Reliability In The Itanium Processor”, IEEE Micro, Sep.-Oct. 2000, pp. 61-69.
Carol A. Babikyan, “The Fault Tolerant Parallel Processor Operating System Concepts And Performance Measurement Overview”, IEEE, 1990, pp. 366-391.
Bill Krause, “Use Processor Redundancy for Maximum Reliability”, CommsDesign, Feb. 1, 2002, 7 pages. http://www.commsdesign.com/article/printableArticle.jhtml?articleID=16504011, last accessed Mar. 21, 2008.
“OMAP5912 Applications Processor”, Literature No. SPRS31E, Dec. 2003, 269 Pages.
“OMAP5910 Dual-Core Processor Functional and Peripheral Overview”, Literature No. SPRU602C, Jan. 2003 70 Pages.
“TMS320VC5441 Fixed-Point Digital Signal Processor”, Literature No. SPRS122E, Dec. 1999, 86 Pages.

Affiliated with

Also associated with

Rating

Determining a set of processor cores to boot does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Determining a set of processor cores to boot, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Determining a set of processor cores to boot will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2677044