Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2008-11-12
2011-10-18
Chaudry, M. Mujtaba K (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S751000
Reexamination Certificate
active
08042025
ABSTRACT:
In one aspect, circuitry to determine a modular remainder with respect to a polynomial of a message comprised of a series of segment. In another aspect, circuitry to access at least a portion of a first number having a first endian format, determine a second number based on a bit reflection and shift of a third number having an endian format opposite to that of the first endian format, and perform a polynomial multiplication of the first number and the at least a portion of the first number.
REFERENCES:
patent: 3980874 (1976-09-01), Vora
patent: 4945537 (1990-07-01), Harada
patent: 4949294 (1990-08-01), Wambergue
patent: 5166978 (1992-11-01), Quisquater
patent: 5274707 (1993-12-01), Schlafly
patent: 5363107 (1994-11-01), Gertz et al.
patent: 5384786 (1995-01-01), Dudley et al.
patent: 5642367 (1997-06-01), Kao
patent: 5920702 (1999-07-01), Bleidt et al.
patent: 5942005 (1999-08-01), Hassner et al.
patent: 6128766 (2000-10-01), Fahmi et al.
patent: 6185596 (2001-02-01), Hadad et al.
patent: 6223320 (2001-04-01), Dubey et al.
patent: 6396926 (2002-05-01), Takagi et al.
patent: 6484192 (2002-11-01), Matsuo
patent: 6530057 (2003-03-01), Kimmitt
patent: 6609410 (2003-08-01), Axe et al.
patent: 6666381 (2003-12-01), Kaminaga et al.
patent: 6721771 (2004-04-01), Chang
patent: 6728052 (2004-04-01), Kondo et al.
patent: 6732317 (2004-05-01), Lo
patent: 6795946 (2004-09-01), Drummond-Murray et al.
patent: 6904558 (2005-06-01), Cavanna et al.
patent: 7027597 (2006-04-01), Stojancic et al.
patent: 7027598 (2006-04-01), Stojancic et al.
patent: 7058787 (2006-06-01), Brognara et al.
patent: 7171604 (2007-01-01), Sydir et al.
patent: 7187770 (2007-03-01), Maddury et al.
patent: 7190681 (2007-03-01), Wu
patent: 7243289 (2007-07-01), Madhusudhana et al.
patent: 7343541 (2008-03-01), Oren
patent: 7428693 (2008-09-01), Obuchi et al.
patent: 7458006 (2008-11-01), Cavanna et al.
patent: 7461115 (2008-12-01), Eberle et al.
patent: 7543214 (2009-06-01), Ricci
patent: 2002/0053232 (2002-05-01), Axe et al.
patent: 2002/0126838 (2002-09-01), Shimbo et al.
patent: 2002/0144208 (2002-10-01), Gallezot et al.
patent: 2003/0167440 (2003-09-01), Cavanna et al.
patent: 2003/0202657 (2003-10-01), She
patent: 2003/0212729 (2003-11-01), Eberle et al.
patent: 2004/0083251 (2004-04-01), Geiringer et al.
patent: 2005/0044134 (2005-02-01), Krueger et al.
patent: 2005/0138368 (2005-06-01), Sydir et al.
patent: 2005/0149725 (2005-07-01), Sydir et al.
patent: 2005/0149744 (2005-07-01), Sydir et al.
patent: 2005/0149812 (2005-07-01), Hall et al.
patent: 2005/0154960 (2005-07-01), Sydir et al.
patent: 2006/0059219 (2006-03-01), Koshy et al.
patent: 2006/0282743 (2006-12-01), Kounavis
patent: 2006/0282744 (2006-12-01), Kounavis
patent: 2007/0083585 (2007-04-01), St Denis et al.
patent: 2007/0150795 (2007-06-01), King et al.
patent: 2007/0157030 (2007-07-01), Feghali et al.
patent: 2007/0297601 (2007-12-01), Hasenplaugh et al.
patent: 2008/0092020 (2008-04-01), Hasenplaugh et al.
patent: 2008/0144811 (2008-06-01), Gopal et al.
patent: 2009/0019342 (2009-01-01), Gueron et al.
patent: 2009/0157784 (2009-06-01), Gopal et al.
patent: 2009/0164546 (2009-06-01), Gopal et al.
patent: 2009/0168999 (2009-07-01), Boswell et al.
patent: 2008/002828 (2008-01-01), None
patent: 2008/002828 (2008-02-01), None
patent: 2009/012050 (2009-03-01), None
patent: 2009/082598 (2009-07-01), None
patent: 2009/085489 (2009-07-01), None
patent: 2009/012050 (2009-08-01), None
patent: 2009/085489 (2009-08-01), None
International Search Report/Written Opinion for PCT Patent Application No. PCT/US2008/085284, mailed on May 18, 2009, pp. 11.
International Preliminary Report on Patentability for PCT Patent Application No. PCT/US2008/085284, mailed on Jul. 1, 2010, 6 pages.
Williams, “A Painless Guide to CRC Error Detection Algorithms,” Version 3, Aug. 19, 2003, Copyright 1993, 37 pages.
Nedjah et al., “A reconfigurable recursive and efficient hardware for Karatsuba-Ofman's multiplication algorithm”, Proceedings of 2003 IEEE Conference on Control Applications, vol. 2, Jun. 23-25, 2003, pp. 1076-1081.
Nedjah et al., “A Review of Modular Multiplication Methods and Respective Hardware Implementation,” Informatica, vol. 30, No. 1, 2006, pp. 111-129.
Tenca et al., “A Scalable Architecture for Montgomery Multiplication,” Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems, Lecture Notes in Computer Science, No. 1717, Springer-Verlag London, UK, 1999, pp. 94-108.
Kounavis et al., “A Systematic Approach to Building High Performance Software-based CRC Generators,” Proceedings of the 10th IEEE Symposium on Computers and Communications, ISCC 2005, pp. 855-862.
Ramabadran et al., “A Tutorial on CRC Computations,” Micro, IEEE, IEEE Computer Society, Aug. 1988, pp. 62-75.
Koc et al., “Analyzing and Comparing Montgomery Multiplication Algorithms,” IEEE Micro, vol. 16, No. 3, 26-33, Jun. 1996, pp. 1-18.
Sprachmann, “Automatic Generation of Parallel Circuits,” IEEE Design and Test of Computers, May-Jun. 2001, pp. 108-114.
Bosselaers et al., “Comparsion of three modular reduction function,” Comparative Description and Evaluation, Katholieke Universiteit Leuven, Department of Electrical Engineering-ESAT Kardinaal Mercierlaan, Oct. 25, 1993, pp. 1-12.
Koopman et al., “Cyclic Redundancy Code (CRC) Polynomial Selection for Embedded Networks,” The International Conference on Dependable Systems and Networks, DSN-2004, pp. 1-10.
Chin-Bou et al., “Design and Implementation of Long-Digit Karatsuba's Multiplication Alogorithm Using Tensor Product Formulation,” Workshop on Compiler Techniques for High Performance Computing, 2003, pp. 1-8.
Dhem, “Design of an Efficient Public-Key Cryptographic Library for RISC-Based Smart Cards,” Faculte Des Sciences appliquees Laboratoire de Microelectronique, Louvain-la-Neuve, Belgium, May 1998, 198 pages.
Fischer et al., “Duality Between Multiplication and Modular Reduction,” Infineon Technologies AG, Secure Mobile Solutions, Munich, Germany, Intel Corporation, Systems Technology Laboratory, Hillsboro, OR, Mar. 2005, pp. 1-13.
Phatak et al., “Fast Modular Reduction for Large Wordlengths via One Linear and One Cyclic Convolution,” Proceedings of the 17th IEEE Symposium on Computer Arithmetic, 2005, pp. 179-186.
Federal Information Processing Standards Publication 197, Announcing the Advanced Encryption Standard (AES), Nov. 26, 2001, 51 pages.
Montgomery, “Five, Six, and Seven-Term Karatsuba-Like Formulae,” IEEE Transactions on Computers, vol. 54, No. 3, Mar. 2005, 8 pages.
Weimerskirch et al., “Generalizations of the Karatsuba Algorithm for Polynomial Multiplication,” communication Security Group, Department of Electrical Engineering & Information Sciences, Bochum, Germany, Mar. 2002, pp. 1-23.
Lin et al., “High-Speed CRC Design for 10 Gbps applications,” ISCAS 2006, IEEE, pp. 3177-3180.
Barrett, “Implementing the Rivest Shamir and Adleman Public Key Encryption Algorithm on a Standard Digital Signal Processor,” Proceedings on Advances in cryptology-CRYPTO '86,Copyright (c) 1998, Springer-Verlag, Berlin 1987, pp. 311-323.
International Preliminary Report on on Patentability received for PCT Patent Application No. PCT/US2007/071829, mailed on Jan. 15, 2009, 7 pages.
Montgomery, “Modular Multiplication Without Trial Division,” Mathematics of 'Computation, vol. 44, No. 170, Apr. 1985, pp. 519-521.
“Number Theory and Public Key Cryptography,” Introduction to Number Theory, Apr. 1996, pp. 1-12.
Campobello et al., “Parallel CRF Realization,” IEEE Transactions on Computers, vol. 52, No. 10, Oct. 2003, Published by the IEEE Computer Society, pp. 1312-1319.
Sedlak, “The RSA Cryptography Processor,” Lecture Notes in Computer Science, Proceedings of the 6th annual international conference on Theory and applicatio
Feghali Wajdi
Gopal Vinodh
Gueron Shay
Ozturk Erdinc
Wolrich Gilbert
Chaudry M. Mujtaba K
Intel Corporation
LandOfFree
Determining a message residue does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Determining a message residue, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Determining a message residue will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4274288