Error detection/correction and fault detection/recovery – Pulse or data error handling – Error count or rate
Reexamination Certificate
2000-04-07
2004-05-11
Decady, Albert (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Error count or rate
C714S792000, C714S794000, C714S795000, C714S796000
Reexamination Certificate
active
06735724
ABSTRACT:
BACKGROUND OF THE INVENTION
The invention relates to electronic devices, and, more particularly, to low-complexity partial response detectors.
Magnetic recording systems for digital data storage may have a functional structure as illustrated in FIG.
1
. Briefly, for a write of data to storage, data bits typically first receive error correction encoding (such as Reed-Solomon); this coding aims to correct errors generated in the write-read process and which escape correction by the detection method of the read process. Further, interleaving blocks of error corrected encoded bits helps correct bursts of errors by spreading the errors over many blocks. Next, the error correction encoded bits are modulation (channel) coded (such as runlength-limited coding); the modulation coding helps read timing recovery. A further preceding may help intersymbol interference decoding. Then the modulation-coded bits modulate the polarity of the write current in a read/write head over the magnetic media (e.g., a spinning disk) to set the magnetization directions of domains in the magnetic media. The pattern of magnetization directions is the stored data.
The read process begins with sensing the domain magnetization directions by voltages induced in the read/write head. After amplification the sensed voltages drive clocked analog-to-digital converters to yield a stream of digital samples. Noise in the read sensing, amplification, and conversion generates errors in the stream of digital samples. A detector (such as a peak detector or a Viterbi maximum likelihood detector) recovers the modulation encoded bits from the stream of digital samples. The modulation decoder then converts the coded bits to the error corrected bits, and lastly, the deinterleaver and error correction decoder corrects errors and recovers the data bits.
For partial response signaling various classes of frequency response for the signal channel prior to detection have been defined; and the class IV response appears particularly suitable for magnetic recording due to pulse shapes requiring minimal equalization. The partial response class IV channel is defined by a channel transfer function polynomial of the form (1−D)(1+D)
N
where N is a positive integer and D is a one period delay.
FIGS. 2
a
-
2
c
shows the pulse shapes for N=1, 2, and 3; the corresponding pulses are termed PR
4
, EPR
4
, and E
2
PR
4
(or EEPR
4
), respectively. Thus an (E)PR
4
sensed voltage consists of a sequence of overlapping (E)PR
4
pulses spaced one period apart and with positive, negative, or zero amplitudes depending upon the corresponding transitions of magnetization domain orientations. The sampling of the (E)PR
4
sensed voltage yields the digital stream input to the detector, typically a sequence detector such as a maximum likelihood Viterbi decoder. Higher storage densities on a magnetic disk require more samples per induced pulse and consequent more overlap, and thus the higher order polynomial transfer functions are used. For example, storage densities of about 3 bits per PW50 (pulse width at half amplitude) would use E
2
PR
4
which has four nonzero samples per pulse; see
FIG. 2
c
. The demand for high density originates with small, portable devices such as notebook computers.
The bit error rate (BER) of the Viterbi detector for systems using the maximum likelihood Viterbi detection of the digital samples can be minimized by tuning read channel parameters such as the continuous time filter and boost, FIR filter coefficients, MR asymmetry correction, and so forth. Known methods for estimating the BER of a particular Viterbi detector include (i) accumulation of the squared error in the equalized sampled values and (ii) accumulation of the number of events when the Viterbi branch metric falls below a fixed or programmed threshold. See Perkins et al, A Window-Margin-Like Procedure for Evaluating PRML Channel Performance, 31 IEEE Tr. Mag. 1109 (1995). But (i) the accumulated squared error does not directly correlate with the BER and (ii) accumulation of the number of under-threshold events requires large amounts of data for accurate results.
Similarly, U.S. Pat. No. 5,754,353, and U.S. Pat. No. 5,761,212 disclose channel quality monitoring systems.
SUMMARY OF THE INVENTION
The present invention provides a method of estimation of the bit error rate (BER) of a Viterbi detector by estimating the distribution of the margin between two path metrics entering each state that lies along the maximum likelihood path through the trellis.
This has the advantages of increased accuracy with limited required data acquisition.
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Brady W. James
Britt Cynthia
De'cady Albert
Hoel Carlton H.
Telecky , Jr. Frederick J.
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