Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2007-03-20
2007-03-20
Decady, Albert (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S700000
Reexamination Certificate
active
10327338
ABSTRACT:
Described are a storage system and method for detecting an intermittent loss of synchronization in communication signals received by an enclosure connected to a Fibre Channel loop. A control board produces a first signal representing a status of communication signals received by the control board. The first signal is in one of a plurality of logical states. A first logical state indicates that the status of the communication signals is invalid and a second logical state indicates that the status of the communication signals is valid. The control board includes a glitch-detection circuit that places a second signal in an asserted logical state when the first signal is in the first logical state during a time interval and holds the second signal at the asserted logical state when the first signal transitions from being in the first logical state to being in the second logical state during the time interval.
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Peeke Douglas E.
Reid Geoffrey
Tuttle James M.
De'cady Albert
EMC Corporation
Gandhi Dipakkumar
Guerin & Rodriguez LLP
Rodriguez Michael A.
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