Destuff circuit for asynchronous digital signals

Details Destuff circuit for asynchronous digital signals Destuff circuit for asynchronous digital signals

1995-03-14

1996-08-20

Chin, Stephen

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

370102, H04L 700

Patent

active

055486240

ABSTRACT:
A destuff circuit is provided with a virtual address counter wherein total number of destuff control pulses for each period T is supposed to be an average number Yn of actual occurrence averaged over latest nT durations. Read address signals are generated phase-locked with the output of the virtual write address counter.

REFERENCES:
patent: 4397017 (1983-08-01), Rokugo
patent: 5111485 (1992-05-01), Serack
patent: 5313502 (1994-05-01), Nawrocki et al.
patent: 5459782 (1995-10-01), Volejnik

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