Design verification for asymmetric phase shift mask layouts

Details Design verification for asymmetric phase shift mask layouts Design verification for asymmetric phase shift mask layouts

1995-12-12

2001-02-06

Lintz, Paul R. (Department: 2768)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C430S005000, C430S394000, C430S396000

Reexamination Certificate

active

06185727

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to the manufacture of very large scale integrated (VLSI) circuit devices and, more particularly, to the resolution enhancement of photolithographic images through the use of phase shifted masks (PSMs).
2. Background Description
Manufacturing of semiconductor devices is dependent upon the accurate replication of computer aided design (CAD) generated patterns onto the surface of a device substrate. The replication process is typically performed using optical lithography followed by a variety of subtractive (etch), additive (deposition) and material modification (e.g., oxidations, ion implants, etc.) processes. Optical lithography patterning involves the illumination of a metallic coated quartz plate known as a photomask which contains a magnified image of the computer generated pattern etched into the metallic layer. This illuminated image is reduced in size and patterned into a photosensitive film on the device substrate. As a result of the interference and processing effects which occur during pattern transfer, images formed on the device substrate deviate from their ideal dimensions and shape as represented by the computer images. These deviations depend on the characteristics of the patterns as well as a variety of process conditions. Because these deviations can significantly effect the performance of the semiconductor device, many approaches have been pursued which focus on CAD compensation schemes which ensure a resultant ideal image.
Conventional photomasks consist of chromium patterns on a quartz plate, allowing light to pass wherever the chromium is removed from the mask. Light of a specific wavelength is projected through the mask onto a photoresist coated wafer, exposing the resist wherever hole patterns are placed on the mask. Exposing the resist to light of the appropriate wavelength causes modifications in the molecular structure of the resist polymers which allows developer to dissolve and remove the resist in the exposed areas. The photomask, when illuminated, can be pictured as an array of individual, infinitely small light sources which can be either turned on (points in clear areas) or turned off (points covered by chrome). If the amplitude of the electric field vector which describes the light radiated by these individual light sources is mapped across a cross section of the mask, a step function will be plotted reflecting the two possible states that each point on the mask can be found in (light on, light off).
These conventional photomasks are commonly referred to as chrome on glass (COG) binary masks, due to the binary nature of the image amplitude. The perfectly square step function exists only in the theoretical limit of the exact mask plane. At any distance away from the mask, such as in the wafer plane, diffraction effects will cause images to exhibit a finite image slope. At small dimensions, that is, when the size and spacing of the images to be printed are small relative to the ratio of the wavelength, &lgr;, to the numerical aperture, NA, of the exposure system, electric field vectors of adjacent images will interact and add constructively. The resulting light intensity curve between the features is not completely dark, but exhibits significant amounts of light intensity created by the interaction of adjacent features. This resolution of an exposure system is limited by the contrast of the projected image; that is, the intensity difference between adjacent light and dark features. An increase in the light intensity in nominally dark regions will eventually cause adjacent features to print as one combined structure rather than discrete images.
The quality with which small images can be replicated in lithography depends largely on the available process latitude; that is, the amount of allowable dose and focus variation that still results in correct image size. Phase shifted mask (PSM) lithography improves the lithographic process latitude by introducing a third parameter on the mask. The electric field vector, like any vector quantity, has a magnitude and direction, so in addition to turning the electric field amplitude on and off, it can be turned on with a 0° phase or turned on with a 180° phase. This phase variation is achieved in PSMs by modifying the length that a light beam travels through the mask material. By recessing the mask by the appropriate depth, light traversing the thinner portion of the mask and light traversing the thicker portion of the mask will be 180° out of phase; that is, their electric field vectors will be of equal magnitude but point in exactly opposite directions so that any interaction between these light beams results in perfect cancellation. For more information on PSMs, the reader is referred to “Phase-Shifting Mask Strategies: Isolated Dark Lines”, Marc D. Levenson,
Microlithography World
, March/April 1992, pp. 6-12.
Phase edge PSM lithography makes use of contrast enhancement afforded by a phase transition under a narrow opaque feature on the mask. This phase transition is caused by an appropriate difference in the path length of the light in the quartz mask substrate on either side of the narrow opaque feature. The path length difference is achieved on the PSM by either depositing or removing transparent mask material selectively on one side of the narrow opaque feature. The asymmetric nature of this mask topography modification forces a deliberate second patterning operation to define areas in which material is to be removed or deposited after the opaque patterns have been formed in the metallic mask coating with a first patterning operation. The complexity of the design of these phase regions in which the mask topography is to be modified has been one of the major inhibitors for full scale insertion into VLSI manufacturing. Methods for the automatic design of these phase edge PSMs are now becoming available. See, application Ser. No. 08/290,625, supra, T. Waas et al., “Automatic Generation of Phase Shift Mask Layouts”, Microelectronic Engineering, Elsevier Science B.V. (1994), pp. 139-142, and Gerald Calan et al., “Application of Alternating-Type Phase Shift Mask to Polysilicon Level for Random Logic Circuits”,
Jpn. J. Appl. Phys
., Vol. 22 (1994). As a result, attention has to shift towards efficient verification of the automatically generated designs. Design errors can cause defective masks by eliminating the phase transition, either by placing a 180° phase region on both sides of the critical feature or by completely omitting the phase region adjacent to certain features.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a checking routine for the verification of a PSM design based on fundamental principles of PSM and utilizing only basic shape manipulation functions and Boolean operations found in most CAD systems.
According to the invention, there is provided a design verification system which checks complete chip designs for the two possible design errors that can cause defective masks by eliminating the phase transition; namely, placing a 180° phase region on both sides of a critical feature or completely omitting the phase region adjacent to certain critical features.


REFERENCES:
patent: 5537648 (1996-07-01), Liebmann et al.
patent: 5573890 (1996-11-01), Spence
Nistler, et al., “Large-area Optical Design Rule Checker for Logic PSM Application”, Proceedings of SPIE—The Int'l Society for Optical Engineers v2254, 1994, pp. 78-92 (abstract only).
Waas, et al., “Automatic Generation of Phase Shift Mask Layouts”, Elsevier Science, 1994, pp. 139-142.
Galan, et al., “Application of Alternating-Type Phase Shift Mask to Polysilicon Level for Random Logic Circits”, Jpn. J. Appl. Phys. v33, 1994.
Levenson, “Extending the Lifetime of Optical Lithography Technologies with Wavefront Engineering”, Jpn. J. Appl. Phys. v33, 1994, pp. 6765-6773.

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