Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-01-03
2006-01-03
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
Reexamination Certificate
active
06983438
ABSTRACT:
A method and software relating to determining whether a square die fits into a package without generating drawings. Package parameters are defined and used to calculate die characteristics. Calculated die characteristics are compared to defined package parameters and/or to calculated package parameters to make a determination of whether a die with the calculated characteristics fits into a package as defined by its parameters. The method and software allow design of dies to fit packages, the design of packages to fit dies, and simultaneous design of dies and packages that fit one another.
REFERENCES:
patent: 5424248 (1995-06-01), Doi
patent: 5608638 (1997-03-01), Tain et al.
patent: 5610417 (1997-03-01), Doi
patent: 5675179 (1997-10-01), Shu et al.
patent: 5684332 (1997-11-01), Chen et al.
patent: 5742079 (1998-04-01), Doi
patent: 5801450 (1998-09-01), Barrow
patent: 5895977 (1999-04-01), Banerjee
patent: 6041269 (2000-03-01), Tain
patent: 6357036 (2002-03-01), Eka et al.
patent: 6581189 (2003-06-01), Tain
Newman Robert
Sarma Pranabendra
Vivares Valerie
Advanced Micro Devices , Inc.
Bowers Brandon
Siek Vuthe
LandOfFree
Design tool for integrated circuit design does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Design tool for integrated circuit design, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Design tool for integrated circuit design will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3541642