Design structure incorporating semiconductor device...

Details Design structure incorporating semiconductor device... Design structure incorporating semiconductor device...

2007-10-23

2010-06-15

Chiang, Jack (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C257S001000, C257S533000, C438S141000, C438S142000, C438S381000

Reexamination Certificate

active

07739636

ABSTRACT:
Design structure embodied in a machine readable medium for designing, manufacturing, or testing a design. The design structure includes active circuitry on a substrate, a bond pad carried by the substrate, and a shielding structure disposed between the substrate and the bond pad. The shielding structure includes a plurality of electrically characterized devices configured to reduce noise transmission from the active circuitry to the bond pad.

REFERENCES:
patent: 5514892 (1996-05-01), Countryman et al.
patent: 5923076 (1999-07-01), Campardo et al.
patent: 6941535 (2005-09-01), Sekido
patent: 2005/0087807 (2005-04-01), Righter
patent: 2006/0154469 (2006-07-01), Hess et al.
David S. Collins, et al, Semiconductor Device Structures and Methods for Shielding a Bond Pad from Electrical Noise, U.S. Appl. No. 11/778,902, filed Jul. 17, 2007.
Matthew E. Gordon, USPTO, final Office Action issued in related U.S. Appl. No. 11/778,902 dated Oct. 30, 2009.
Matthew E. Gordon, USPTO, Office Action issued in related U.S. Appl. No. 11/778,902 dated Apr. 3, 2009.

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