Design of instantaneously restartable clocks and their use...

Electrical computers and digital processing systems: support – Clock control of data processing system – component – or data...

Reexamination Certificate

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C171S055000, C171S055000, C171S055000

Reexamination Certificate

active

11526376

ABSTRACT:
Disclosed are, inter alia, instantaneously restartable clocks and their use. For example, instantaneously restartable clocks can be used to receive data from another independently clocked subsystem in a manner that removes the possibility of metastability errors. A restartable clocking signal generator, relying on oscillating signals typically generated by a continuous oscillating source, is used to generate a restartable clocking signal which can be asynchronously restarted in response to one or more control signals. In one implementation, an apparatus includes multiple independently clocked subsystems and a clockless sequencing network, with the clockless sequencing network being used to initiate the start of a restartable clock in order to reliably receive and process data between the independently clocked subsystems.

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Shuo-Yuan Hsiao and Chung-Yu Wu, “A Parallel Structure for CMOS Four-Quadrant Analog Multipliers and Its Application to a 2-GHz RF Downconversion Mixer,” IEEE Journal of Solid-State Circuits, vol. 33, No. 6, Jun. 1998, pp. 859-869.
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Jerome R. Cox, Jr. and David M. Zar, “Synthesis of Control Elements from Petri Net Models,” WUSEAS-2005-43, Washington University, St. Louis, MO, Sep. 16, 2005.

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