Design method and apparatus for a semiconductor integrated...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000, C703S020000

Reexamination Certificate

active

07107569

ABSTRACT:
A functional block for verifying correct interface operation of any functional block is generated from interface description and installed on a LSI chip. To accomplish this, from the interface description, hardware description of a synthesizable interface checker is generated. Means for selecting interface functions to be checked is provided, thereby making it possible to reduce the overhead of circuits to be installed on the LSI.

REFERENCES:
patent: 5453936 (1995-09-01), Kurosawa
patent: 5493507 (1996-02-01), Shinde et al.
patent: 5953519 (1999-09-01), Fura
patent: 5963454 (1999-10-01), Dockser
patent: 6675310 (2004-01-01), Bloom et al.
patent: 6678645 (2004-01-01), Rajsuman et al.
patent: 2000-123064 (1998-10-01), None

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