Design for a non-blocking cache for texture mapping

Details Design for a non-blocking cache for texture mapping Design for a non-blocking cache for texture mapping

2005-08-23

2005-08-23

Chauhan, Ulka J. (Department: 2676)

Computer graphics processing and selective visual display system

Computer graphics display memory system

Cache

C345S552000, C345S537000, C345S531000, C345S503000, C711S118000

Reexamination Certificate

active

06933945

ABSTRACT:
A non-blocking cache for texture mapping is implemented by separating Cache Tags from Cache Data. Multiple requests for data may be processed in parallel without strict ordering or synchronization. Separating Cache Tags and Cache Data results in a texture memory cache design that preempts stalling which would otherwise occur in case of cache-misses. Multiple Cache Tags with corresponding respective system memory controllers and Data Cache units allow for simultaneous processing of multiple requests without strict ordering. In preferred embodiments the texture memory cache may also be configured to predict cache misses and merge with burst reads from memory, and may equally be configured to minimize memory read-requests necessary during multitexturing, thus maximizing bandwidth.

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