Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-03-29
2005-03-29
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
06874137
ABSTRACT:
A design data processing method is a method of processing hierarchically configured design data, comprises the steps of: a) obtaining first design data of a predetermined rank of hierarchy; b) obtaining second design data of a rank of hierarchy higher than the predetermined rank of hierarchy; and c) combining the second design data to the first design data.
REFERENCES:
patent: 559630 (1996-05-01), Nishiyama et al.
patent: 5627999 (1997-05-01), Cheng et al.
patent: 6009251 (1999-12-01), Ho et al.
patent: 6223327 (2001-04-01), Yamaji
Hanamitsu Hiroaki
Ishikawa Yoichiro
Ito Noriyuki
Yamashita Ryoichi
Fujitsu Limited
Siek Vuthe
Staas & Halsey , LLP
LandOfFree
Design data processing method and recording medium does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Design data processing method and recording medium, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Design data processing method and recording medium will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3437678