Deposition control of stop layer and dielectric layer for use in

Details Deposition control of stop layer and dielectric layer for use in Deposition control of stop layer and dielectric layer for use in

1997-12-18

2000-05-09

Hiteshew, Felisa

Semiconductor device manufacturing: process

Chemical etching

Combined with the removal of material by nonchemical means

438624, 438637, 438631, 438699, H01L 21304

Patent

active

060603933

ABSTRACT:
A deposition method allows for the forming of a uniform dielectric stop layer that is substantially void of defects caused by outgassing effects. The stop layer is deposited in a reactor chamber at a higher than normal temperature of at least 480.degree. C. The stop layer is then combined with an overlying dielectric layer to provide an inter-level dielectric structure through which a local interconnect can be formed to provide a conductive path to one or more regions of the underlying semiconductor devices.

REFERENCES:
patent: 4803177 (1989-02-01), Rabinzohn
patent: 5817572 (1998-10-01), Chiang et al.

Affiliated with

Also associated with

Rating

Deposition control of stop layer and dielectric layer for use in does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Deposition control of stop layer and dielectric layer for use in, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Deposition control of stop layer and dielectric layer for use in will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1064589