Depletion-type NAND flash memory

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S322000, C257SE29300, C365S185250, C365S185330

Reexamination Certificate

active

08039886

ABSTRACT:
A depletion-type NAND flash memory includes a NAND string composed of a plurality of serially connected FETs, a control circuit which controls gate potentials of the plurality of FETs in a read operation, a particular potential storage, and an adjacent memory cell threshold storage, wherein each of the plurality of FETs is a transistor whose threshold changes in accordance with a charge quantity in a charge accumulation layer, the adjacent memory cell threshold storage stores a threshold of a source line side FET adjacent to a source line side of a selected FET, and the control circuit applies a potential to the gate electrode of the source line side FET in the read operation, the applied potential being obtained by adding a particular potential stored in the particular potential storage to a threshold stored in the adjacent memory cell threshold storage.

REFERENCES:
patent: 6115287 (2000-09-01), Shimizu et al.
patent: 7432561 (2008-10-01), Mizukami et al.
patent: 7432562 (2008-10-01), Bhattacharyya
patent: 7459748 (2008-12-01), Shirota et al.
patent: 7781807 (2010-08-01), Nishihara et al.
patent: 2006/0049449 (2006-03-01), Iino et al.
patent: 2007/0002632 (2007-01-01), Okayama et al.
patent: 2008/0128780 (2008-06-01), Nishihara et al.
patent: 2008/0315280 (2008-12-01), Watanabe et al.
patent: 2009/0080250 (2009-03-01), Nishihara et al.
patent: 11-163303 (1999-06-01), None

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