Demand-based dynamic clock control for transaction processors

Details Demand-based dynamic clock control for transaction processors Demand-based dynamic clock control for transaction processors

2005-06-21

2008-07-15

Abdelmoniem, Elamin (Department: 2116)

Electrical computers and digital processing systems: support

Computer power control

Power conservation

C713S300000, C713S310000, C713S320000, C713S321000, C713S323000, C713S324000, C713S330000, C713S340000

Reexamination Certificate

active

07401243

ABSTRACT:
A variable speed data processor includes a clock generator generating a plurality of clocks at different clock rates. Clock select circuitry synchronously selects one of the clocks as an output clock signal to data processing circuitry, based on a data activity indication. Activity logic generates the data activity indication based at least in part on the existence of data processing activity targeted to the data processing circuitry. When the data processing circuitry experiences bursty data processing activity, the clock rate can shift rapidly between the multiple clock rates, conserving power without substantially diminishing the availability of the data processing circuitry.

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