Electrical computers and digital data processing systems: input/ – Intrasystem connection – Protocol
Reexamination Certificate
2008-01-24
2011-11-22
Cleary, Thomas J (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Protocol
C710S300000, C710S305000, C712S011000
Reexamination Certificate
active
08065456
ABSTRACT:
An advanced processor comprises a plurality of multithreaded processor cores configured to support a plurality of software generated read or write instructions for interfacing with a star topology serial bus interface. The multiple-core processor has at least one of an internal fast messaging network or an interface switch interconnect configured to link the processor cores together such that each processor core has a data pathway to each of the other processor cores without going through memory. The fast messaging network or interface switch is also configured to be operably coupled to the star topology serial bus interface. In one aspect of an embodiment of the invention, the fast messaging network connects to a high-bandwidth star-topology serial bus such as a PCI express (PCIe) interface capable of supporting multiple high-bandwidth PCIe lanes.
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Hass David T.
Zhu Julianne Jiang
Cleary Thomas J
NetLogic Microsystems, Inc.
Vista IP Law Group LLP
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