Delayed tap signal generating circuit for controlling delay...

Details Delayed tap signal generating circuit for controlling delay... Delayed tap signal generating circuit for controlling delay...

2005-09-06

2005-09-06

Nguyen, Minh (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Having specific delay in producing output waveform

C327S296000

Reexamination Certificate

active

06940331

ABSTRACT:
A circuit and method of generating delayed tap signals can adjust a delay difference by interpolating two input clock signals as indicated by an offset information signal. In the circuit, first and second tap signals are generated by interpolating first and second clock signals in response to the offset information. A delay difference between output tap signals is adjusted by an amount indicated by the offset information. Thus, tap signals having a fine delay difference can be obtained by adjusting the offset information.

REFERENCES:
patent: 5986949 (1999-11-01), Toda
patent: 6052011 (2000-04-01), Dasgupta
patent: 6104228 (2000-08-01), Lakshmikumar
patent: 6191632 (2001-02-01), Iwata et al.
patent: 6570425 (2003-05-01), Yamaguchi
patent: 2002232274 (2002-08-01), None

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