Delayed sense amplifier multiplexer isolation

Details Delayed sense amplifier multiplexer isolation Delayed sense amplifier multiplexer isolation

2006-12-22

2010-02-16

Nguyen, Tuan T (Department: 2824)

Static information storage and retrieval

Read/write circuit

Differential sensing

C365S205000, C365S210100, C365S210120

Reexamination Certificate

active

07663955

ABSTRACT:
Methods and circuit arrangements are provided for improving equalization of sense nodes of a sense amplifier in a semiconductor memory device. When a memory array segment on a side a sense amplifier has a bitline leakage anomaly for which the sense amplifier is to be isolated when that memory is in an unselected state, isolation of the sense amplifier from the memory array segment is delayed when transitioning from a selected state of the memory array segment to an unselected state of the memory array segment. The duration of the delay is sufficient to allow time for equalization of the sense nodes of the sense amplifier before isolating the sense amplifier from the memory array segment.

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