Static information storage and retrieval – Read/write circuit – Signals
Patent
1979-05-02
1980-09-16
Hecker, Stuart N.
Static information storage and retrieval
Read/write circuit
Signals
307DIG3, 365189, G11C 700
Patent
active
042233968
ABSTRACT:
A memory cell is connected to a word line and a data line. A first pulse is applied from an address decoder to the memory cell, and data read out from the memory cell is detected by a sense amplifier to which a second pulse is supplied. There is provided a pulse supply means for supplying the first and second pulses, which includes a delay line supplied with the first pulse and a pulse generator circuit composed of MOS transistors which receives as an input a delayed pulse from the delay line and delivers the second pulse. If the word line is formed of, for example, a polysilicon layer, then the delay line is also formed of a polysilicon layer so that the delay line may have substantially the same signal delay characteristic as that of the word line. Since the signal delay characteristics of the word and delay lines may vary correspondingly to each other in accordance with changes of device parameters, the phase difference between the first and second pulses can be adjusted for optimum results.
REFERENCES:
patent: 3778784 (1973-12-01), Karp et al.
patent: 3898479 (1975-08-01), Proebsting
patent: 3902082 (1975-08-01), Proebsting et al.
Hecker Stuart N.
Tokyo Shibaura Denki Kabushiki Kaisha
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