Delay stage circuitry for a ring oscillator

Details Delay stage circuitry for a ring oscillator Delay stage circuitry for a ring oscillator

1994-12-01

1997-01-21

Chin, Stephen

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

375377, 330253, 330261, 330277, 327287, 327288, H03D 324

Patent

active

055966101

ABSTRACT:
A delay stage for a ring oscillator supplies a first output signal and a second output signal. Each of the first and second output signals has a peak-to-peak voltage swing. The first and second output signals are complementary to each other. The delay stage includes a differential amplifier for generating the first output signal and the second output signal and a voltage clamping circuit for limiting the peak-to-peak voltage swing of the first and second output signals. The voltage clamping circuit is coupled between the first output signal and the second output signal. The differential amplifier includes a first NMOS transistor and a second NMOS transistor for generating the first and second output signals. The differential amplifier also includes a first PMOS transistor and a second PMOS transistor coupled to (1) the first and second NMOS transistors and (2) the voltage clamping circuit for providing bias currents to the first and second NMOS transistors.

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