Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2005-03-22
2005-03-22
Chase, Shelly A (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
Reexamination Certificate
active
06871316
ABSTRACT:
A decoder generally comprising a branch metrics circuit and a state metrics circuit. The branch metrics circuit may be configured to generate a plurality of branch metric signals. The state metrics circuit may be configured to (i) add the branch metric signals to a plurality of state metric signals to generate a plurality of intermediate signals, (ii) determine a next state metric signal to the state metric signals, (iii) determine a normalization signal in response to the intermediate signals, and (iv) normalize the state metric signals in response to the normalization signal.
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Gross et al., Simplified MAP algorithm suitable for implementation of turbo decoders, Aug. 1998, IEEE, Electronic Letters, vol. 34, No. 16, p. 1577-1578.*
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“A Turbo Code Tutorial”, By William E. Ryan, Jan. 2000, 9 pages.
Qian Cheng
Wong Alfred Kwok-Kit
Chase Shelly A
LSI Logic Corporation
Maiorana PC Christopher P.
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