Delay locked loops having delay time compensation and...

Details Delay locked loops having delay time compensation and... Delay locked loops having delay time compensation and...

2006-01-17

2006-01-17

Callahan, Timothy P. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S149000

Reexamination Certificate

active

06987407

ABSTRACT:
A delay locked loop (DLL) is provided that includes a phase detector configured to detect a phase error between an internal clock signal and the external clock signal and output a phase error signal. A low pass filter is configured to output a predetermined control signal in response to the phase error signal. A variable delay circuit is configured to change a delay time in response to the predetermined control signal, delay the phase of the external clock signal with respect to the changed delay time, lock the delayed external clock signal and output the internal clock signal. A compensation delay circuit is configured to receive a control voltage based on a delay time introduced by a data output circuit and delay a phase of the internal clock signal for a first delay time based on the control voltage and output the delayed internal clock signal to the phase detector. Methods of compensating a delay for a DLL are also provided.

REFERENCES:
patent: 6275079 (2001-08-01), Park
patent: 6285225 (2001-09-01), Chu et al.
patent: 6346838 (2002-02-01), Hwang et al.
patent: 6522182 (2003-02-01), Tomita et al.
patent: 6608743 (2003-08-01), Suzuki
patent: 6621315 (2003-09-01), Heo et al.
patent: 6768360 (2004-07-01), Tsuruki

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