Delay locked loop with harmonic lock and hang prevention...

Details Delay locked loop with harmonic lock and hang prevention... Delay locked loop with harmonic lock and hang prevention...

2007-04-24

2007-04-24

Tran, Khai (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

Reexamination Certificate

active

10437874

ABSTRACT:
The present invention prevents the DLL from locking into the wrong phase, harmonic lock and hang. The detection is independent of temperature, voltage and process that the DLL is running. Including these mechanisms in the DLL design, the operating frequency range of the DLL can be extended significantly. Also many design blocks in the main loop can be reused for these additional circuitries, the design time of this DLL is much faster than to design a whole new hang or harmonic lock prevention circuitries.

REFERENCES:
patent: 5179303 (1993-01-01), Searles et al.
patent: 5337022 (1994-08-01), Pritchett
patent: 6667643 (2003-12-01), Ko
patent: 7038971 (2006-05-01), Chung

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